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Fix CM5 display: delay vc4/panel_cwu50 to after RP1 PCIe init

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Loading display drivers in initrd (~3s) before RP1 PCIe southbridge
is ready (~12s) causes 'Cannot find any crtc or sizes' because the
DSI encoder isn't reachable. Rex loads these via udev late in boot.

- boot.initrd.kernelModules: only ocp8178_bl (backlight, RP1-independent)
- boot.kernelModules: vc4 + panel_cwu50 loaded in stage 2 after RP1
This commit is contained in:
Hermes
2026-06-09 21:42:24 -04:00
parent fb7c3e6424
commit 288b7538d5
1 changed files with 8 additions and 0 deletions
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8
hosts/uConsole/configuration.nix
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@@ -185,6 +185,14 @@ in
boot.blacklistedKernelModules = [ ]; boot.blacklistedKernelModules = [ ];
# CRITICAL: Delay vc4 + panel_cwu50 loading to after RP1 PCIe init
# On CM5, RP1 southbridge takes ~12s to initialize. Loading display
# drivers in initrd (~3s) causes "Cannot find any crtc" because the
# DSI encoder isn't reachable yet. Rex loads them later via udev.
# Keep ocp8178_bl in initrd (backlight is independent of RP1).
boot.initrd.kernelModules = lib.mkForce [ "ocp8178_bl" ];
boot.kernelModules = lib.mkBefore [ "vc4" "panel_cwu50" ];
# ============================================================ # ============================================================
# Extra udev rules for SDR and HAM radio devices # Extra udev rules for SDR and HAM radio devices
# ============================================================ # ============================================================