2026-06-13 18:49:36 -04:00
|
|
|
--- a/drivers/gpu/drm/panel/panel-cwu50.c
|
|
|
|
|
+++ b/drivers/gpu/drm/panel/panel-cwu50.c
|
2026-06-13 18:51:39 -04:00
|
|
|
@@ -67,7 +67,9 @@ static void cwu50_init_sequence(struct cwu50 *ctx)
|
2026-06-13 18:49:36 -04:00
|
|
|
dcs_write_seq(0x72,0x06);
|
|
|
|
|
dcs_write_seq(0x75,0x03);
|
|
|
|
|
+ /* DSI_INIT0: set 4 lanes (bits[1:0]=11) — fixes lane count default */
|
|
|
|
|
+ dcs_write_seq(0x80,0x03);
|
|
|
|
|
dcs_write_seq(0xE0,0x01);
|
2026-06-13 18:51:39 -04:00
|
|
|
+
|
|
|
|
|
dcs_write_seq(0x00,0x00);
|
|
|
|
|
dcs_write_seq(0x01,0x47);//VCOM0x47
|
|
|
|
|
dcs_write_seq(0x03,0x00);
|
|
|
|
|
|
|
|
|
|
@@ -164,7 +166,7 @@ static int cwu50_probe(struct mipi_dsi_device *dsi)
|
2026-06-13 18:49:36 -04:00
|
|
|
|
|
|
|
|
dsi->lanes = 4;
|
|
|
|
|
dsi->format = MIPI_DSI_FMT_RGB888;
|
|
|
|
|
- dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
|
|
|
|
|
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
|
|
|
|
|
|
|
|
|
|
ctx->id_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_IN);
|
|
|
|
|
if (IS_ERR(ctx->id_gpio)) {
|